Download AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to by Ricardo Lourenço, Nuno Lourenço, Nuno Horta PDF

By Ricardo Lourenço, Nuno Lourenço, Nuno Horta

This paintings addresses the study and improvement of an leading edge optimization kernel utilized to analog built-in circuit (IC) layout. quite, this works describes the variations contained in the AIDA Framework, an digital layout automation framework totally built via on the built-in Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, via bettering AIDA-C, that's the circuit optimizer component to AIDA, with a brand new multi-objective multi-constraint optimization module that constructs a base for a number of set of rules implementations. The proposed answer implements 3 techniques to multi-objective multi-constraint optimization, particularly, an evolutionary procedure with NSGAII, a swarm intelligence strategy with MOPSO and stochastic hill hiking process with MOSA. additionally, the applied constitution permits the straightforward hybridization among kernels remodeling the former easy NSGAII optimization module right into a extra developed and flexible module assisting a number of unmarried and multi-kernel algorithms. the 3 multi-objective optimization ways have been confirmed with CEC2009 benchmarks to restricted multi-objective optimization and confirmed with actual analog IC layout difficulties. The completed effects have been in comparison by way of functionality, utilizing statistical effects got from a number of self reliant runs. eventually, a few hybrid methods have been additionally experimented, giving a foretaste to quite a lot of possibilities to discover in destiny work.

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Additional info for AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing

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3. Like before, the circuit’s performance figures are measured from the simulation results. 4 indicates the design specifications for this circuit working as a versatile low power DC buffer. 5, … ,100] × [14, 16, … ,198]. Fig. 3 Two-stage amplifier optimization variables and ranges Variable (unit) Min. Grid unit Max. 2 Circuit Optimization Using the Single-Kernel Algorithms To study the three single-kernel multi-objective strategies available in AIDA-CMK, a fixed number of evaluations (circuit simulations) were used to provide a fair ground for comparison of the optimization strategies.

1. The optimization variables are the following device model parameters: finger widths, lengths, and number of fingers of the transistors. The index number in each Fig. 1 2 1,000 10 8 variable is according to the device names in Fig. 1. Note that the devices are paired: PM0 is equal to PM3; PM1 is equal to PM2; NM4 is equal to NM5; NM6 is equal to NM7; NM8 is equal to NM9; and NM10 is equal to NM11. Also, all variable ranges respect the technology available limits, in order to provide physically implementable solutions.

By combining and reusing the diverse strategies it is reasonable to assume that is possible to take advantage of their diverse strong points. By a careful implementation of the support framework, these algorithms can be experimented easily. 7, sharing the elements to solve the problem more efficiently. The parallel combination uses a pool of elements that is divided between each kernel and evolved using a different approach. Each time is deemed to rearrange the elements between the kernels, if is-merge-step(step) is true, the pool of elements is redistributed among the kernels.

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